4-to-2 Encoder Virtual Laboratory

PrayogSetu — Interactive Digital Electronics Experiment
Digital Electronics
EXPERIMENT MODE:
🎛️ Digital Input Lines (4-to-1 Selection) Rule: Exactly 1 HIGH
📡 Input Signal Lines (D0 – D3)
D0 Input 0 (Code: 00)
D1 Input 1 (Code: 01)
D2 Input 2 (Code: 10)
D3 Input 3 (Code: 11)
💡 Tip: Click any switch to set its logic level to 1 (ON) or 0 (OFF). For a standard 4-to-2 encoder, exactly one input should be HIGH at a time.
💡 Encoded Output Monitor & LEDs MANUAL MODE
Y1 (MSB) OR1 = D2 + D3 0 (LOW)
Y0 (LSB) OR2 = D1 + D3 0 (LOW)
🔌 Gate-Level Circuit Schematic (2 OR Gates) Y1 = D2 + D3  |  Y0 = D1 + D3
GATE-LEVEL VIEW
D0 1 D1 0 D2 0 D3 0 D0 → Code 00 (no OR gate) OR Y1 = D2 + D3 OR Y0 = D1 + D3 Y1 Y1 (MSB) Y0 Y0 (LSB)
🧮 Real-Time Boolean Logic Evaluation
Y1 (MSB) Gate Evaluation 0 (LOW)
Y1 = D2 + D3 = 0 + 0 = 0
Y0 (LSB) Gate Evaluation 0 (LOW)
Y0 = D1 + D3 = 0 + 0 = 0
💡 Input D0 is HIGH (1). D0 corresponds to binary code 00. Neither OR gate receives a HIGH signal, so Y1=0 and Y0=0.
📊 4-to-2 Encoder Truth Table Highlighted row indicates active state
Active Input Line D3 D2 D1 D0 Y1 (MSB) Y0 (LSB)
D0 ACTIVE 0 0 0 1 0 0
D1 0 0 1 0 0 1
D2 0 1 0 0 1 0
D3 1 0 0 0 1 1
⚠️ Note on Input Validity: In a basic 4-to-2 encoder, only one input line should be active (HIGH = 1) at a time. If more than one input is active simultaneously (e.g. D1=1 and D2=1), the circuit produces an invalid combination unless a Priority Encoder is used.
📖 1. Theory & Working Principle

What is a 4-to-2 Encoder?

An Encoder is a combinational digital circuit that performs the reverse operation of a decoder. It has \(2^N\) input lines and \(N\) output lines. A 4-to-2 encoder compresses 4 input signal lines (\(D_0, D_1, D_2, D_3\)) into a 2-bit binary code (\(Y_1, Y_0\)).

Purpose of an Encoder

In digital systems, encoders reduce the number of physical transmission lines required to send information by encoding active input lines into compact binary representations.

Boolean Logic Equations

The output equations are derived from the active inputs that produce a logic '1' for each output bit:

Y1 = D2 + D3   |   Y0 = D1 + D3

Why is D0 omitted from the OR gates?
When \(D_0 = 1\), the desired output is binary 00 (\(Y_1 = 0, Y_0 = 0\)). Since both outputs should remain LOW, \(D_0\) does not need to trigger either OR gate.

⚡ 2. Input Validity & Comparison

Valid vs Invalid Input Conditions

  • Valid Condition: Exactly one input line is HIGH (\(1\)) while all others are LOW (\(0\)).
  • Invalid Condition: Multiple input lines HIGH simultaneously (e.g. \(D_1=1\) and \(D_2=1\)). The basic encoder produces ambiguous outputs. Priority encoders resolve this by selecting the highest-indexed input.

Encoder vs Decoder Comparison

Feature Encoder Decoder
Lines \(2^N\) Inputs → \(N\) Outputs \(N\) Inputs → \(2^N\) Outputs
Function Converts 1 active line to binary code Converts binary code to 1 active line
Logic Gates Uses OR gates Uses AND / NOT gates

Key Real-World Applications

  • Keyboard Encoders: Converts keypresses into binary ASCII code.
  • Data Compression: Reduces pin counts in microprocessors.
  • Control Systems & Microprocessors: Encodes interrupt request lines into binary vector addresses.
  • Communication & DSP: Digitizes multi-channel input selectors.