Input Controls
Live Display
| A | B | Output (Y = (A · B)') |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
Current Observation
Set inputs A and B using the toggle switches and observe how the NAND gate processes the signals. The output remains HIGH (1) except when both inputs are HIGH (1).
Signal Flow Observation
Toggle the switches to observe the signal flow animation through the wires. Notice how the output turns LOW only when both input signals reach the NAND gate simultaneously as HIGH.
Definition
A NAND (NOT-AND) gate is a fundamental digital logic gate that produces a LOW (0) output only when all of its inputs are HIGH (1). If any input is LOW (0), the output is HIGH (1).
Working Principle
The NAND gate performs logical multiplication followed by logical inversion. It calculates the AND result of its inputs and complements the output state.
- When both inputs A and B are HIGH → internal AND is 1 → output is inverted to LOW (0).
- When any input is LOW → internal AND is 0 → output is inverted to HIGH (1).
Universal Gate Property
NAND gates are classified as Universal Logic Gates because any fundamental Boolean function (AND, OR, NOT, NOR, XOR) can be constructed using combinations of only NAND gates.
Truth Table Summary
The 2-input NAND gate has 4 input combinations. Three combinations produce a HIGH output, and only one combination (A=1, B=1) produces a LOW output.
Boolean Expression
Y = (A · B)' (also written as Y = A · B or Y = NOT(A AND B))
Industrial Applications
- Industrial Safety Interlock: Used in emergency trip systems where machinery continues operating safely (HIGH) until all safety sensors detect a critical trip state (HIGH), shutting down the machine (LOW).
- Universal Logic Implementation: Enables low-cost manufacturing of complex digital circuits by repeating a single NAND gate IC type (e.g. 7400 Quad NAND).
- Security and Intrusion Alarms: Keeps an alert system active or armed until multiple security perimeter sensors are breached simultaneously.
- Digital Memory Latches: Cross-coupled NAND gates form fundamental SR latches and flip-flops used for binary data storage in SRAM and microcontrollers.
- Fail-Safe Control Circuits: Ensures default output remains energized (1) unless all danger parameters become active (1).
Boolean Expression
Y = (A · B)'
The apostrophe (') or overbar represents the NOT (inversion) operation applied to the result of the AND operation (A · B).
De Morgan's Theorem
By De Morgan's Law, the NAND operation is logically equivalent to an OR operation with inverted inputs:
(A · B)' = A' + B'
Boolean Properties of NAND
- Inverter (NOT): A NAND A = (A · A)' = A'
- Commutative Law: (A · B)' = (B · A)'
- Non-Associative: (A NAND B) NAND C ≠ A NAND (B NAND C)
- Double Inversion (AND): ((A · B)')' = A · B
Current Calculation
A = 0, B = 0 → Y = (0 · 0)' = 1
Industrial Safety Interlock
This demonstrates an industrial safety interlock system. The machine remains RUNNING under normal conditions. It stops only when all safety conditions become TRUE (1) simultaneously.
If both Sensor 1 AND Sensor 2 detect trip signals (1 and 1), the NAND gate output goes LOW (0), cutting power to stop the machine immediately.